NOTICE: August 08, 2016 Si2 EMAIL REFLECTOR MAIL IS BEING REJECTED BY SOME COMPANIES
NOTE: Si2 External IP Address Changes
* Recently, Si2 switched network service providers and subsequently, all of its external IP addresses.
* Email reflectors are used by our many Production and Open Standards collaborative research/development working groups.
* If your company uses access control lists to manage email traffic, and you send emails via the Si2 reflector list system, then the following information will be relevant to you.
CONTACT YOUR IT DEPARTMENT TO VERIFY YOUR CURRENT OR FUTURE STATUS:
After the Si2 IP changes, reflector list messages that previously appeared as email coming from 22.214.171.124 will now show as email coming from 126.96.36.199. Any access control lists that reference the old Si2 IP (188.8.131.52), will need to be updated to the new Si2 IP (184.108.40.206) in order to restore previous functionality. Additionally, make sure that your company IT has Si2 white listed!
for Manufacturability Coalition Workshop Date:
Sunday, June 13
Meeting room: 207C
Free Admission, Register at DAC Website
The workshop will educate the
audience on a high level DFM verification and optimization language
called OpenDFM. OpenDFM rules bridge the gap between a layout style
that allows only a few, very restricted layout patterns and a style
that allows purely arbitrary layouts. OpenDFM functions transform
database shapes, regardless of their origin and design style, into the
on-silicon target shapes that design and manufacturing both agree are
the reference shapes for silicon based measurements and extraction.
OpenDFM increases the level of pattern uniformity in the layout and it
polishes the rough spots in the layout when it finds layout patterns
that are known to be problematic. OpenDFM modifies the design to
physically optimize and measurably affect electrical performance to
enhance Process Limited Yield (PLY) and/or Circuit Limited Yield (CLY)
during the design process and not at post tapeout.
This workshop is not intended to continue to admire the problems of
Design for Manufacturing for SoC design but to show that real progress
is being made. As part of the workshop, selected vendors will present
their products aimed at helping designers produce higher yielding
integrated circuits and systems.