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DAC - Anaheim Convention Center

Monday, June 13, 2005

The era of “point tools” linked by files is long over.  Streamlined Integrated Design Systems are essential to meet today’s business demands.  Custom chip designers struggle to integrate growing numbers of macros while insuring manufacturability.   ASIC and SoC designers must optimize many factors simultaneously to achieve “Design Closure”.  Product designers are exploring 3D-IC and SiP to fully exploit chip and package synergy and remain competitive. 

What does it take to develop effective Integrated Design Systems?  Vendors provide solutions for parts of a methodology, but most users want to exploit the best tools from multiple vendors and add proprietary applications to gain a competitive advantage. Progress has been made on standard APIs for sharing data, but much more is needed to enable design systems to keep pace with the industry.

This workshop brings together design system managers and design system providers from industry leading companies to assess the state of integrated design systems today and identify the remaining challenges that need to be addressed.  In addition, representatives from academia, related standards groups and industry “gurus” will participate with their views.  A panel session will bring the speakers together to address your questions and let your comments be heard.

Overall, the goal is to focus attention to one of the most important issues facing the electronics industry.

<>DAC – Monday, June 13, 2005 Anaheim, California 
Organizers:  John Darringer – IBM, Rahul Goyal - Intel,
Scott Peterson - LSI, Alva Barney - HP

1:00  Welcome            Chair: John Darringer, Research Manager, IBM

1:20  User Views        Chair: Alva Barney, CAD Manager, HP

(Five 8-minute talks by design system managers describing how they have solved tough integration problems for high-performance custom design as well as mixed signal designs, and what they think of the most important challenges ahead)


2:10 Vendor Views   Chair: Rahul Goyal, Dir. EDA Business, Intel

(Five 8-minute talks from EDA companies (large and small) describing how they have solved tough integration problems and what they think of the most important challenges ahead)


3:00  Other Views      Chair: Scott Peterson, Dir. Rapid Chip Methodology, LSI

(Four 10-minute talks from Universities, Standards Groups and Industry gurus describing their efforts and views of design system integration)

  • Gary Smith, Chief Analyst, Gartner Dataquest
    • The Automation of RTL Design
  • Steve Schulz, CEO, Si2      
    • How Standards Can Help   
  • Andreas Kuehlmann, Dir. Cadence Berkeley Labs
    • University Research on Integrated Design Systems                                                                    
  • Jim Solomon, CEO Xulu Entertainment
    • The Role of Start-ups           


3:50  Break


4:10  PANEL: What’s Next?   Chair: Richard Goering, Editor, EE Times

(An interactive session with the speakers above with the audience discussing the most important challenges facing our industry and the steps that need to be taken to address them.


5:00  Adjourn

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