3rd Integrated Design Systems Workshop
Integrated Design Systems Workshop: Models for Design and Manufacturing
- How Modeling Challenges are Touching Every Aspect of IC Design -
Presentations Available Below
Organizer(s): Jake Buurma, Sumit DasGupta, Nick
English - Si2
Rules-based design methods are rapidly being replaced by the need for
models representing everything in modern chip design flows -- from the
system-level analysis through foundry process variation. This workshop
will bring together experts in important modeling areas such as: delay
calculation, statistical timing, low power, DFM, yield, IP blocks,
first examine the necessity for model based design and how it is
impacting design tools and flows, convergence/divergence issues,
business implications and anticipated interactions between foundries,
fabless design and EDA. They will then discuss significant research,
development and cooperation across the industry, and debate whether it
is sufficient and timely enough to meet the needs of coming technology
nodes and what impacts can be expected on IC business models.
Click on each link
for the presentation
1.Modeling for Power Minimization
Gary Delp - LSI
David Hathaway - IBM Corp.
2. Modeling for Timing
Bob Kezer - Intel Corp.
Rob Aitken - ARM Ltd
3. Modeling for Design Reuse
Chris Rowen - Tensilica
James Spoto -
4. Modeling for DFM/DFY
Walter Ng - Chartered
Andrew B. Kahng - Univ.
of California, San Diego
5. Panel Discussion: All
speakers Moderator: Chandu Visweswariah - IBM Corp.